1. Field of the Invention
The present invention relates to an apparatus for integrating switch ports to provide a multi-stage switch structure enabling a variety of switch combinations to accommodate various traffic types in an ATM (Asynchronous Transfer Mode) switching system.
2. Description of the Related Art
Generally, an ATM switch having a shared memory structure is functionally limited by the size and/or the speed of each switch port. Buffers are provided for each port for storing cells prior to readout. The port speed is limited by xe2x80x9cnxe2x80x9d if the chip is formed by n xc3x97n switches, and such integrated service is hard to maintain the cell ordering when connecting a subscriber with a different speed under STM-4c or STM-16c that are faster than its allocated port speed.
It is an object of the present invention to provide an apparatus for integrating the switch ports in the ATM switching system.
It is another object of the present invention to provide an apparatus for obtaining a variety of ATM switch connections by a small-scale chip in the ATM switching system.
It is still another object of the present invention to provide an apparatus for improving the link efficiency in the ATM switching system.
It is further another object of the present invention to provide an apparatus for connecting with a subscriber whose input rate is faster than the allocated switch port speed in the ATM switching system.
According to one aspect of the present invention, an apparatus for integrating the switch ports in an ATM (Asynchronous Transfer Mode) switching system includes a cell controller for controlling input cells by the output port information of the routing information obtained from the input cells; a plurality of bundle registers for generating write enable signals with the values specified by the present counter upon receiving a valid integrated output port information via the cell controller; and, a plurality of write enable signal generators for applying the write enable signals to the address FIFO""s of corresponding switch ports.
The foregoing and other objects, features, and advantages of the invention will be apparent from the following, more detailed description of the preferred embodiments illustrated in the accompanying drawings. The present invention will now be described more specifically with reference to the drawings attached only by way of example.